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Product Data Sheet

Model 805-SG Ultra-Agile Microwave Signal Source

Compact, low-phase-noise microwave signal source covering 8 kHz to 20 GHz. A battery-capable module, usable as a drop-in replacement for the obsolete QuickSyn FSW-0010/0020 synthesizers from NI.

Specifications drawn from Model 805-SG datasheet v104 (dc-41604202). Items not stated in the source are marked (verify).
Berkeley Nucleonics Model 805-SG compact 20 GHz microwave signal source

1Overview

The Model 805-SG microwave signal source modules deliver instrument-grade performance, increased functionality, and efficient power consumption at a reduced size and affordable cost. The design combines low phase noise with fast switching capability, covering a wide frequency range from 8 kHz up to 20 GHz. The low spurious and harmonic content of the signal makes it ideally suitable for many demanding applications.

The unit contains a high stability OCXO, providing accurate, power-calibrated, phase-lockable output signals. The frequency resolution is 1 mHz and the power resolution is 0.01 dB power. The unit is remotely controlled with USB, LAN or SPI control.

Due to the form-factor, the unit can also be used as a drop-in replacement of the obsolete "QuickSyn Synthesizers" from NI.

Definitions. Specifications describe the warranted performance of the instrument for 23 ±5 °C after a 30-minute warm-up period, unless otherwise stated. Min/Max: parameter range guaranteed by product design and/or production tested, with guard-bands for statistical distribution, measurement uncertainty, and environmental conditions. Typical: expected mean values, not warranted performance.

2Key Features

  • Microsecond switching-speed. Fast frequency switching for agile test sequences.
  • Low-phase noise and spur levels. Clean spectral output across the band.
  • Portable battery option. Field-ready in a compact form.
  • Low level error accuracy. Power-calibrated output.
  • Compact module. 7 x 5.4 x 1 in including connectors, under 2.4 lb.
  • High-stability OCXO with accurate, phase-lockable output signals.

3Signal Specifications

ParameterMinTypicalMaxNote
Frequency range10 MHz
8 kHz		20 GHz
20 GHz		settable to 22 GHz
Option 8K
Frequency resolution0.001 Hz
0.001 Hz		GUI SW setting resolution
SPI interface setting resolution
Frequency switching time500 µs
15 µs		20 µsOption FS
Phase adjustment range0 deg360 deg
Phase resolution0.1 deg

4Phase Noise

Model 805-SG SSB phase noise performance versus offset frequency for carriers from 100 MHz to 20 GHz
Figure 1: SSB Phase Noise Performance.

SSB phase noise (dBc/Hz), typical and maximum, by carrier frequency and offset from carrier.

Frequency10 Hz
Typ.		Max.100 Hz
Typ.		Max.1 kHz
Typ.		Max.20 kHz
Typ.		Max.100 kHz
Typ.		Max.1 MHz
Typ.		Max.10 MHz
Typ.		Max.
100 MHz-108-103-136-131-150-145-155-150-155-150-155-150-154-149
1 GHz-80-75-116-111-137-132-147-142-147-142-145-140-156-151
2 GHz-74-69-112-107-133-128-144-139-144-139-141-136-155-150
5 GHz-65-60-101-96-126-121-136-131-138-133-136-131-148-143
10 GHz-60-55-96-91-120-115-130-125-131-126-12p(verify)-124-142-137
20 GHz-52-47-91-86-114-109-125-120-126-121-124-119-137-132
Verification note. The 1 MHz / 10 GHz typical value reads "-12p" in the source PDF (likely "-126" or "-129"). Marked (verify) pending the corrected datasheet value.

5Spectral Purity

Model 805-SG 2nd and 3rd harmonic levels versus frequency at 10 dBm output power
Figure 2: Harmonics (at 10 dBm Output Power).
ParameterMinTypicalMaxNote
HarmonicsAt 10 dBm; See plot below
< 100 MHz-35 dBc
100 MHz to 20 GHz-50 dBc-40 dBc
4.5 GHz to 20 GHz-50 dBc-40 dBc
Sub-harmonicsAt 10 dBm; See plot below
< 5 GHz-75 dBc-65 dBc
5 GHz to 11.5 GHz-65 dBc-55 dBc
11.5 GHz to 20 GHz-75 dBc-65 dBc
Non-harmonic spurious10 kHz to 0.5 GHz offset from carrier
< 1 GHz-65 dBc-55 dBc
1 GHz to 20 GHz-70 dBc-60 dBc
Model 805-SG wideband spectrum at a 5 GHz carrier, 0 to 18 GHz
Figure 3: Wideband Spectrum for 5 GHz.

Wideband spectra confirm the low harmonic and spurious content across the operating band.

Model 805-SG wideband spectrum at a 14 GHz carrier, 0 to 18 GHz
Figure 4: Wideband Spectrum for 14 GHz.

6Level Performance

Model 805-SG power level linearity, output deviation in dB versus set power for carriers 1 to 18 GHz
Figure 5: Power level linearity.
ParameterMinTypicalMaxNote
Output power levelSettable to +25 dBm; See plot below
8 kHz to 10 MHz-20 dBm9 dBm
10 GHz to 20 GHz-20 dBm15 dBm
Power level uncertainty0.25 dB1.0 dB-20 to 15 dBm. See plots below
Power resolution0.01 dB0.1 dBGUI SW setting resolution
SPI interface setting resolution
Power settling time1 ms
5 µs		ALC off (open loop)
ALC on (closed loop)
Output impedance50 Ω
VSWR1.7
Reverse power protection
  DC voltage7 V
  RF power23 dBm
Model 805-SG frequency response, output deviation in dB versus frequency for set powers -20 to +15 dBm
Figure 6: Frequency Response.

Power level linearity and frequency response remain within the stated uncertainty across the band.

7Reference Frequency

ParameterMinTypicalMaxNote
Internal reference frequency100 MHz
Calibrated accuracy of int. reference±30 ppbCalibrated at 23 ± 3 °C
Temperature stability (0 to 50 °C)±100 ppb
Aging 1st year500 ppb
Aging per day5 ppbAfter 30 days operation
Warm-up time5 min
Reference frequency input10 MHz, 100 MHz, 1 GHz
10 – 250 MHz		Fixed reference frequency
Variable reference frequency
Reference input level
  10 MHz
  100 MHz
  1 GHz
  10 – 250 MHz
-3 dBm
-3 dBm
-3 dBm
-3 dBm
+12 dBm
+12 dBm
+12 dBm
+12 dBm
Fixed reference frequency
Fixed reference frequency
Fixed reference frequency
Variable reference frequency
Variable reference frequency resolution100 kHz
Lock range
  10 MHz
  100 MHz
  1 GHz
  10 – 250 MHz
±1.5 ppm
±100 ppm
±100 ppm
±1.5 ppm
Fixed reference frequency
Fixed reference frequency, bypass
Fixed reference frequency, bypass
Variable reference frequency
Reference input impedance50 Ω
Reference frequency output10 MHz, 100 MHz, 1 GHzSettable
Output power
  10 MHz
  100 MHz
  1 GHz
+3 dBm
+3 dBm
+3 dBm
+5 dBm
+5 dBm
+5 dBm
+7 dBm
+7 dBm
+7 dBm
Reference output impedance50 Ω

Reference architecture. External variable reference frequencies and 10 MHz external fixed reference frequency will be internally locked to the internal 100 MHz reference with a PLL circuit. 100 MHz and 1 GHz external fixed reference frequencies are bypassing the internal reference PLL circuit and are acting directly as reference signal for the synthesizer.

8Modulation Capability

Model 805-SG pulse modulation on/off ratio in dB versus frequency at 10 dBm output power
Figure 7: On/Off Ratio – pulse modulation (at 10 dBm Output Power).
ParameterMinTypicalMaxNote
Pulse ModulationOption PULSE
Modulation sourceInternal
External (PULSE)
On/off ratio
  < 1 GHz
  1 GHz to 20 GHz
70 dB
80 dB
85 dB
100 dB		At 10 dBm; see plot below.
Repetition frequency0 Hz10 MHz
Pulse width30 ns20 s
Pulse width compression20 ns
Pulse resolution10 ns
Pulse rise/fall time9 ns12 ns
Pulse polarityNormal
Inverse		Settable
Pulse train length14096
Pulse overshoot10%
External pulse latency45 ns60 ns

9Sweeping Capability

ParameterMinTypicalMaxNote
Sweep parametersFrequency, power, list
Number of list points150,000
Sweep typeLinear, logarithmic, random
Step time500 µs
20 µs		20 s
20 s		Option FS
Timing resolution10 ns
Timing accuracy per point20 ns
Generalized list sweepAllows for individual setting of frequency, step-time, and off-time for each point

10Trigger (PULSE)

ParameterMinTypicalMaxNote
Trigger typesContinuous
Single (point)
Gated		Gated direction
Trigger sourceExternal (PULSE, SPI Trigger)
Bus (Ethernet, USB, SPI)
Trigger modesContinuous free run
Trigger and run
Reset and run
External trigger latency140 ns
External trigger uncertainty20 ns
External trigger delay0 s20 sSettable
External delay resolution10 ns
Trigger modulo1255Execute only on Nth trigger event
Trigger polarityRising
Falling
External PULSE input threshold0.85 V0.9 V0.95 VTTL compatible
External PULSE input voltage range-0.5 V+5.5 VTTL compatible, 100 kΩ pull-up to +5.0 V
External PULSE input hysteresis30 mV

11Mechanical Specifications

Dimensions & Weight

ParameterValue
Including connectorsW x L x H = 7 x 5.4 x 1 in
Excluding connectorsW x L x H = 7 x 5 x 1 in
Weight< 2.4 lb
Model 805-SG mechanical outline drawing showing top, rear, and bottom views with dimensions in millimeters and inches, and 18x M2.5 mounting thread detail
Outline and mounting dimensions (top, rear, and bottom views). Dimensions in mm (inches). Mounting: 18× M2.5 threads, 2.5 mm metric thread diameter, 7.9 mm thread depth, 9.5 mm bore depth.

Installation Instructions

The module relies on passive cooling. It is mandatory to mount the device on a heatsinking surface. Make sure the synthesizer operates under the conditions specified in this datasheet. Otherwise, the thermal protection will turn off the RF output.

12Interfaces

Front Panel

Model 805-SG front panel showing numbered connectors: 1 DC IN, 2 SPI, 3 ETH, 4 USB, 5 PULSE IN A, 6 PWR, 7 REM, 8 RF LEDs, 9 REF OUT, 10 REF IN, 11 RF OUT A
Front panel connector layout. Callout numbers correspond to the rows in the table below.
LabelTypeDescription
1. DC INKPJX-4SDC input (see also "Power Connector Assembly"). Redundant power supply input to the SPI Interface DC input (supply with higher voltage will be chosen).
2. SPIDF1BZ-20DP-2.5DSSPI Interface, including DC input (see also "SPI Interface")
3. ETHRJ-45Ethernet port
4. USBMicro BUSB Port
5. PULSESMATrigger / Pulse interface, 100 kΩ pull-up to +5.0 V
6. PWRLEDPower ON/OFF indicator
7. REMLEDRemote connection status indicator
8. RFLEDRF output ON/OFF indicator
9. REF OUTSMAReference signal output
10. REF INSMAReference signal input
11. RF OUTSMARF output

Power Connector Assembly

PinAssignment
1GND
2DC Supply (see also "Power requirements")
3GND
4DC Supply (see also "Power requirements")
Model 805-SG power connector pin assignment diagram, front view of the 4 pin receptacle showing Pin 1 and Pin 3 on the left, Pin 2 and Pin 4 on the right
Power connector pin assignment (mating face view).

The power connector is a 4 pin, snap and lock receptacle. BNC recommends Kycon manufactured plugs KPPX-4P from its KPPX series.

SPI Interface

SignalPinTypeDescription
SPI_CLK11InputSPI clock. Supplied by the controlling host. The controlling host is the SPI master, the synthesizer is the SPI slave.
SPI_SS#13InputSPI Slave Select. This signal is an active low input from the host to the synthesizer. It frames command communications. For each command, SPI_SS# goes low before the first bit is sent and goes high after the last bit is sent
SPI_MISO7OutputMaster In/Slave Out. Data line from the synthesizer to the host.
SPI_MOSI9InputMaster Out/Slave In. Command/Data line from the host to the synthesizer.
TRIGGER17InputEdge sensitive input. The trigger signal of +3.3 V can be configured for multiple trigger modes (see also "Trigger (PULSE)").
LOCK15OutputOutput indicates the RF output of the synthesizer is locked on its current setting (+3.3 V locked, 0 V unlocked).
REF_LOCK16OutputOutput indicates the synthesizer has detected an external reference signal and locked on that signal (+3.3 V locked, 0 V unlocked).
RESET#18InputInternally pulled up to +3.3 V with 100 kΩ resistor. Active low signal, which has a minimum width of 1 ms, will reset the synthesizer to a default state.
DC IN3, 4InputExternal power supply (see also "Power requirements"). Redundant power supply input to the DC IN interface (supply with higher voltage will be chosen).
GND8, 10, 19, 20Ground.
DNC1, 2, 5, 6, 12, 14Do not connect. Reserved for factory / future use.
Model 805-SG SPI connector pin numbering, 20 pin double-row header with even pins 20 to 2 on the top row and odd pins 19 to 1 on the bottom row, pin 1 keyed with a square pad
SPI interface connector pin numbering (20 pin, 2.50 mm double-row header). Pin 1 is the keyed square pad.

The SPI interface connector is a 20 pin, 2.50 mm spaced double-row header. BNC recommends HIROSE manufactured socket DF1B-20DS-2.5RC and corresponding contacts from its DF1B series.

SymbolValueDescription
tSC> 25 nsSPI_SS# to be low before first clock edge
tCS> 25 nsSPI_CLK to be low before releasing SPI_SS#
tSU> 15 nsSPI_MISO/MOSI to be stable before rising edge of clock
tCH> 25 nsMinimum high time of a clock pulse
tCL> 25 nsMinimum low time of a clock pulse
fCLK≤ 12 MHzMaximum clock frequency
Model 805-SG SPI timing diagram showing SPI_SS#, SPI_CLK, SPI_MISO, and SPI_MOSI waveforms with timing intervals tSC, tSU, tCH, tCL, and tCS
SPI interface timing diagram (SPI_SS#, SPI_CLK, SPI_MISO, SPI_MOSI) with the timing intervals defined in the table above.

13Ordering Information

Host ModelProductDescription
805-SG805-SG-120 GHz wideband frequency synthesizer module (with AC adapter)
805-SGOption FSFast switching
805-SGOption 8KFrequency Range extension to 8 kHz
805-SGOption PULSEInternal / external pulse modulation

For a configured quote or a demo unit, contact Berkeley Nucleonics.

14General Characteristics

ParameterValue
Remote programming interfacesEthernet, USB 2.0, SPI
Control languageSCPI Version 1999.0, native command set
DC power requirements12.0 – 30.0 VDC; 24 W typical
AC mains adapter (supplied)100-240 VAC in / 24 V, 2.7 A DC out
Storage temperature range-40 to 70 °C
Operating temperature range0 to 60 °C, non-condensing, temperature of passive heatsink
Operating and storage altitudeup to 15,000 feet
Safety/EMCCE markComplies with applicable Safety and EMC regulations and directives
Recommended calibration cycle24 months

15Applications

  • QuickSyn FSW-0010 / 0020 replacement
  • Automated Test Environment
  • Characterizing antennas, semiconductor devices, and other components
  • Radar signal generation and Electronic warfare

Berkeley Nucleonics Corporation · info@berkeleynucleonics.com · 800-234-7858